language: en

A Systematic Approach to Host Interface Design for High-Speed Networks

Peter Steenkiste
School of Computer Science Carnegie Mellon University
5000 Forbes Avenue Pittsburgh, Pennsylvania 15213-3891

Abstract In recent years, networks with media rates of 100 Mbit/second or more have become widely available (FDDI, ATM, HIPPI, ..). However, many computer systems cannot make use of the available bandwidth because of the high overhead associated with network communication. In this paper we review the operations involved in communication over high-speed networks, and we describe optimizations of the network interface that improve network throughput. We also discuss how the payoff of the optimizations is influenced by features of the host software and architecture. This paper is based on our experience with the interfaces for the Nectar and Gigabit Nectar networks.

Keywords: network interfaces, high-speed networks, buffer management, memory hierarchy

[This research was sponsored by the Defense Advanced Research Projects Agency (DOD) under contract number MDA972-90-C-0035, in part by the National Science Foundation and the Defense Advanced Research Projects Agency under Cooperative Agreement NCR-8919038 with the Corporation for National Research Initiatives.]