language: en

Using Don't Cares in Logic Minimization for LUT-Based FPGAs

Philip Chong 13327872
May 25, 1997

Abstract Don't care information has proven to be useful in logic minimization. Here, the use of don't care information in network collapsing for mapping to LUT-based FPGAs is explored. Results are shown which indicate that this approach does not result in appreciable improvements in network size.

1 Introduction